In the semiconductor integrated circuit (IC) industry, technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of IC processing and manufacturing.
Semiconductor device fabrication includes many different processes, each process having associated cycle-time and cost requirements. It is a continued desire to reduce cost and cycle-time in device fabrication. Further, it is a continued desire to reduce the number of defects and improve yields in semiconductor fabrication. The present disclosure provides improvements that relate to the fabrication of such devices.